3D integration in VLSI circuits : (Record no. 39385)

MARC details
000 -LEADER
fixed length control field 03278cam a22003618i 4500
001 - CONTROL NUMBER
control field 20412244
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20190330113125.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 180319s2018 flu b 001 0 eng
010 ## - LIBRARY OF CONGRESS CONTROL NUMBER
LC control number 2018010530
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781138710399 (hardback : acidfree paper)
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
Canceled/invalid ISBN 9781315200699 (ebook)
040 ## - CATALOGING SOURCE
Original cataloging agency DLC
Language of cataloging eng
Description conventions rda
Transcribing agency DLC
042 ## - AUTHENTICATION CODE
Authentication code pcc
050 00 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7874.893
Item number .A16 2018
082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395 SAK-K
Edition number 23
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Sakuma, Katsuyuki
245 00 - TITLE STATEMENT
Title 3D integration in VLSI circuits :
Remainder of title implementation technologies and applications /
Statement of responsibility, etc. [edited by] Katsuyuki Sakuma.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc. Boca Raton
Name of publisher, distributor, etc. CRC Press
Date of publication, distribution, etc. 2018
263 ## - PROJECTED PUBLICATION DATE
Projected publication date 1807
300 ## - PHYSICAL DESCRIPTION
Extent 217 p.
365 ## - TRADE PRICE
Price type code GBP
Price amount 110.00
490 0# - SERIES STATEMENT
Series statement Devices, circuits, & systems
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc Includes bibliographical references and index.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note 3D Integration: Technology and Design / P. Franzon -- 3D SiP for ASIC and 3D DRAM Integration / L. Li -- A New Class of High-capacity, Resource-rich FPGAs Enabled by 3D-IC Stacked Silicon Interconnect Technology (SSIT) / S. Ramalingam, Henley Liu, Myongseob Kim, Boon Ang, Woon-Seong Kwon, Tom Lee, Susan Wu, Jonathan Chang, Ephrem Wu, Xin Wu, and Liam Madden -- Challenges in 3D / M. Koyanagi, T. Fukushima, and T. Tanaka -- Wafer-Level Three-Dimensional Integration (3DI) using Bumpless Interconnects and Ultra-Thinning / T. Ohba -- 3DI stacking technologies for high volume manufacturing by use of wafer level oxide bonding integration / S. Skordas, K. Sakuma, K. Winstel, and C. Kothandaraman -- Toward 3D high density / S. Cheramy, A. Jouve, C. Fenouillet-Beranger, P. Vivet, and L. Di Cioccio -- Novel Platforms and Applications Using 3D and Heterogeneous Integration Technologies / K-N. Chen, Ting-Yang Yu, Yu-Chen Hu, Cheng-Hsien Lu.
520 ## - SUMMARY, ETC.
Summary, etc. Currently, the term 3D integration includes a wide variety of different integration methods, such as 2.5-dimensional (2.5D) interposer-based integration, 3D integrated circuits (3D ICs), 3D systems-in-package (SiP), 3D heterogeneous integration, and monolithic 3D ICs. The goal of this book is to provide readers with an understanding of the latest challenges and issues in 3D integration. TSVs are not the only technology element needed for 3D integration. There are numerous other key enabling technologies required for 3D integration and the speed of the development in this emerging field is very rapid. To provide readers with state-of-the-art information on 3D integration research and technology developments, each chapter has been contributed by some of the world's leading scientists and experts from academia, research institutes, and industry from around the globe--
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Three-dimensional integrated circuits.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Integrated circuits
General subdivision Very large scale integration.
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Sakuma, Katsuyuki,
Relator term author.
906 ## - LOCAL DATA ELEMENT F, LDF (RLIN)
a 7
b cbc
c orignew
d 1
e ecip
f 20
g y-gencatlg
955 ## - COPY-LEVEL INFORMATION (RLIN)
Book number/undivided call number, CCAL (RLIN) rk21 2018-03-19
Copy information and material description, CCAL + MDES (RLIN) rk21 2018-03-19 to rk09 for review
952 ## - LOCATION AND ITEM INFORMATION (KOHA)
Withdrawn status
Holdings
Lost status Source of classification or shelving scheme Damaged status Not for loan Collection code Home library Current library Shelving location Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
  Dewey Decimal Classification     621 BITS Pilani Hyderabad BITS Pilani Hyderabad General Stack (For lending) 30/03/2019   621.395 SAK-K 38708 13/07/2024 30/03/2019 Books
An institution deemed to be a University Estd. Vide Sec.3 of the UGC
Act,1956 under notification # F.12-23/63.U-2 of Jun 18,1964

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