Digital system design with FPGA : implementation using verilog and VHDL / (Record no. 91260)
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000 -LEADER | |
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fixed length control field | 01474nam a22001817a 4500 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
fixed length control field | 231202b2017 |||||||| |||| 00| 0 eng d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
International Standard Book Number | 9789387067509 |
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
Classification number | 621.395 UNS-C |
100 ## - MAIN ENTRY--PERSONAL NAME | |
Personal name | Unsalan, Cem |
245 ## - TITLE STATEMENT | |
Title | Digital system design with FPGA : implementation using verilog and VHDL / |
Statement of responsibility, etc. | Cem Unsalan and Bora Tar |
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
Place of publication, distribution, etc. | India |
Name of publisher, distributor, etc. | McGraw Hill |
Date of publication, distribution, etc. | 2017 |
300 ## - PHYSICAL DESCRIPTION | |
Extent | 384 p. |
365 ## - TRADE PRICE | |
Price type code | INR |
Price amount | 750.00 |
500 ## - GENERAL NOTE | |
General note | This practical guide offers comprehensive coverage of FPGA programming using the two most popular hardware description languages―Verilog and VHDL. You will expand your marketable electronic design skills and learn to fully utilize FPGA programming concepts and techniques. <br/><br/>Digital System Design with FPGA: Implementation Using Verilog and VHDL begins with basic digital design methods and continues, step-by-step, to advanced topics, providing a solid foundation that allows you to fully grasp the core concepts. Real-life examples, start-to-finish projects, and ready-to-run Verilog and VHDL code is provided throughout.<br/>• Concepts are explained using two affordable boards―the Basys 3 and Arty<br/>• Includes PowerPoint slides, downloadable figures, and an instructor's solutions manual<br/>• Written by a pair of experienced electronics designers and instructors |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | VHDL (Computer hardware description language) |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Verilog (Computer hardware description language) |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
Topical term or geographic name as entry element | Field programmable gate arrays |
952 ## - LOCATION AND ITEM INFORMATION (KOHA) | |
Withdrawn status |
Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection code | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
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Dewey Decimal Classification | 621 | BITS Pilani Hyderabad | BITS Pilani Hyderabad | Text & Reference Section (Student cannot borrow these books) | 02/12/2023 | 621.395 UNS-C | 47763 | 13/07/2024 | 02/12/2023 | Course Text Book |