Sutherland, Stuart <br/><br/>
System Verilog for design :  a guide to using system verilog for hardware design and modeling / 
Stuart Sutherland, Simon Davidmann and Peter Flake 
 - 2nd 
 - New York  Springer  2006 
 - 418 p. 
<br/><br/>Includes bibliographical references and index. 
<br/><br/><label>ISBN: </label>9780387333991 (alk. paper) 0387333991 (alk. paper) 
<br/><br/><label>LCCN: </label>2006928944 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Verilog (Computer hardware description language)<br/>Electronic digital computers--Design and construction.<br/>Computer simulation.
<br/><br/><label>LC Class. No.: </label>TK7885.7  / .S875 2006 
<br/><br/><label>Dewey Class. No.: </label>621.392 SUT-S