TY - BOOK AU - Sutherland,Stuart AU - Davidmann,Simon AU - Flake,Peter TI - System Verilog for design: a guide to using system verilog for hardware design and modeling SN - 9780387333991 (alk. paper) AV - TK7885.7 .S875 2006 U1 - 621.392 SUT-S PY - 2006/// CY - New York PB - Springer KW - Verilog (Computer hardware description language) KW - Electronic digital computers KW - Design and construction KW - Computer simulation N1 - Includes bibliographical references and index UR - http://www.loc.gov/catdir/enhancements/fy0824/2006928944-d.html UR - http://www.loc.gov/catdir/enhancements/fy0824/2006928944-t.html ER -