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System Verilog for design : a guide to using system verilog for hardware design and modeling / Stuart Sutherland, Simon Davidmann and Peter Flake

By: Contributor(s): Material type: TextTextPublication details: New York Springer 2006Edition: 2ndDescription: 418 pISBN:
  • 9780387333991 (alk. paper)
  • 0387333991 (alk. paper)
Subject(s): DDC classification:
  • 621.392 SUT-S
LOC classification:
  • TK7885.7 .S875 2006
Online resources:
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Holdings
Item type Current library Collection Shelving location Call number Status Date due Barcode Item holds
Books Books BITS Pilani Hyderabad 621 General Stack (For lending) 621.392 SUT-S (Browse shelf(Opens below)) Available 27637
Total holds: 0

Includes bibliographical references and index.

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